- multicore processing
- многоядерная обработка, многоядерный режим вычисленийSyn:см. тж. multicore processor
Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. . 1998-2007.
Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. . 1998-2007.
Hybrid Multicore Parallel Programming — HMPP (Hybrid Multicore Parallel Programming) est un ensemble d outils de développement au service de la programmation multi cœurs hybride. HMPP est un produit commercial de CAPS entreprise [1]. Sommaire 1 Description 2 Les principes 3 … Wikipédia en Français
Audio multicore cable — An audio multicore cable, or most commonly known as a snake is a compact cable, typically about the diameter of a coin, used in the audio recording and entertainment fields, which contains typically 4 64 individual shielded pair microphone cables … Wikipedia
Digital signal processing — (DSP) is concerned with the representation of discrete time signals by a sequence of numbers or symbols and the processing of these signals. Digital signal processing and analog signal processing are subfields of signal processing. DSP includes… … Wikipedia
Native (processing) — Native: Methodology for sharing code processing over a number of CPU coresAt some fundamental level, all computers have a core which takes care of the primary processing. Instructions, originally written in some high level language, finally get… … Wikipedia
Accelerated Processing Unit — (kurz „APU“; englisch für „beschleunigte Verarbeitungseinheit“) ist eine an die Bezeichnungen CPU und GPU angelehnte Bezeichnung für einen Hauptprozessor mit integrierten Koprozessoren. Wie der Name bereits andeutet, soll dabei der Hauptprozessor … Deutsch Wikipedia
Multi-core processor — Diagram of a generic dual core processor, with CPU local level 1 caches, and a shared, on die level 2 cache … Wikipedia
Multi-core — A multi core processor (or chip level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single integrated circuit (IC), called a die, or more dies packaged together. The individual core is normally a… … Wikipedia
QorIQ — is Freescale s brand of future 32 bit Power Architecture based communications microcontrollers. It is the evolutionary step from the PowerQUICC platform and will be built around one or more Power Architecture e500mc cores and come in five… … Wikipedia
MIPS architecture — MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. As of|1999|alt=By the late 1990s it was estimated that one in three RISC chips produced were … Wikipedia
University of Strathclyde — Oilthigh Srath Chluaidh (Gaelic) Motto The Place of Useful Learning Established 1796 Anderson s University ; 1964 granted University … Wikipedia
Parallel computing — Programming paradigms Agent oriented Automata based Component based Flow based Pipelined Concatenative Concurrent computing … Wikipedia